2022 Fall Intro. VLSI -- 李鎮宜教授

Senior Teaching Assistant: 

• Ph.D. Lin-Hung Lai(賴林鴻), National Yang Ming Chiao Tung University

  • Office: ED430

  • Tel: 03-5712121 #54238 

  • Mail: lhlai@ieee.org

Course Objectives: 

This course aims to convey junior EE students techniques to analyze and design system by means of VLSI technology and CAD tools. Starting from VLSI process technology and transistor's behavior. an indepth discussion covering circuit, logic, and subsystem designs will be presented. Upon completion of the course, the student will be able to design system-level IC (SLIC) based on available VLSI technology and CAD tools. As such he/she will be able to work in a team of designers or stand alone to meet system-level specifications.

The course offers a complete yet accessible introduction to crosstalk models and optimization. It covers minimizing power consumption at every level of abstraction, from circuits to architecture and new insights into design-for-testability (DFT) techniques that maximize quality despite quicker turnarounds. It also presents detailed coverage of the algorithms underlying contemporary VLSI computer-aided design (CAD) software, so designers can understand their tools no matter which ones they choose. This course mainly contains 4 topics which are essential to the practice of VLSI design as a system design discipline. They are given below and will be addressed in more detail during lecture and discussion.

Grading Policy: 

• Mid/Final-Term Exam: 70%;

• Labs on SPICE and Logic Layout: 30%