軟體清單 Software

EEHPC伺服器登入時不會預先將軟體環境source，但有提供四個快捷建置環境的選項

1. • 輸入 "yes" --> 自動source  Full Custom 與 Cell Based 所需軟體

   • 輸入 "layout" --> source  Full Custom 所需軟體  source /usr/cad/full-custom.cshrc  

   • 輸入 "coding" --> source  Cell Based 所需軟體 source /usr/cad/cell-based.cshrc

   • 輸入 "chbash" 與 "env_conda" --> 改變bash 與 source conda 環境設定

1.   Hspice

   • 單核心:  hspice demo.sp -o out.log

   • 多核心:  hspice demo.sp -hpp -mt 4 -o out.log

2.  Virtuoso / ICADVM

   • source /usr/cad/cadence/CIC/ICADVM.cshrc (only for FinFET)

   • virtuoso

   • Remember to setup .cdsenv .cdsinit cds.lib (sample file include in /RAID2/cshrc/virtuoso/)

3.  Sign off

   • virtuoso -nograph -replay bbox.replay -log result.log

   • calibre -gui -drc -runset runset -batch

   • calibre -gui -pex -runset runset -batch

1.  irun/xrun

   • 單核心: irun TESTBED.v -define RTL -define FUNC -debug -f file_list.f -incdir /usr/cad/synopsys/synthesis/cur/dw/sim_ver/  -notimingchecks -loadpli1 debpli:novas_pli_boot

   • 單核心:  xrun TESTBED.v -define RTL -define FUNC -debug -f file_list.f -incdir /usr/cad/synopsys/synthesis/cur/dw/sim_ver/  -notimingchecks -loadpli1 debpli:novas_pli_boot

   • 多核心:  xrun -mcl 4 TESTBED.v -define RTL -define FUNC -debug -f file_list.f -incdir /usr/cad/synopsys/synthesis/cur/dw/sim_ver/  -notimingchecks -loadpli1 debpli:novas_pli_boot

2.  Design Compiler / Prime Time

   • DC: dcnxt_shell -f syn.tcl | tee syn.log  ---> set_host_options -max_cores 4

   • PT:  pt_shell -f ptpx.tcl | tee CORE_power.log ---> set_host_options -max_cores 4

3.  Innovus

   • innovus

   • setMultiCpuUsage -localCpu 4

4. VCS

   • 單核心:  vcs +v2k -sverilog -R -full64 +define+FUNC +define+RTL TESTBED.v -debug_access+all -l vcs.log -P /usr/cad/synopsys/verdi/2019.06/share/PLI/VCS/linux64/novas.tab /usr/cad/synopsys/verdi/2019.06/share/PLI/VCS/linux64/pli.a -y /usr/cad/synopsys/synthesis/cur/dw/sim_ver/ +incdir+/usr/cad/synopsys/synthesis/cur/dw/sim_ver/ +libext+.v -f file_list.f +notimingchecks

   • 多核心:  vcs +v2k -sverilog -R -full64 +define+FUNC +define+RTL TESTBED.v -debug_access+all -l vcs.log -P /usr/cad/synopsys/verdi/2019.06/share/PLI/VCS/linux64/novas.tab /usr/cad/synopsys/verdi/2019.06/share/PLI/VCS/linux64/pli.a -y /usr/cad/synopsys/synthesis/cur/dw/sim_ver/ +incdir+/usr/cad/synopsys/synthesis/cur/dw/sim_ver/ +libext+.v -f file_list.f +notimingchecks -j4

1.  Python Development 

   • # Source conda setting

source /RAID2/cshrc/exec_bash.cshrc

source /RAID2/cshrc/conda.bashrc

1. • # Create new conda environment 

conda create -n myenv python=3

conda env list

1. • # Activate the conda virtual env

conda activate myenv

1. • # Install package

conda install numpy -y

conda list

1. • # Deactivate the conda virtual env

conda deactivate

1.  MATLAB

   • matlab

2.  VIVADO

   • vivado

3.  Editor

   • code [file name]

   • gedit [file name]

   • vim [file name]

4.  System Monitor 

   • top / htop / btop / glances

   • iftop

若有需要安裝其他Tool需求，請先於家目錄測試軟體能否成功安裝，若測試沒問題，請聯繫管理員協助將軟體在主伺服器上 lhlai@ieee.org 

自定義預設環境

• vim ~/.tcshrc

setenv CDS_AUTO_64BIT ALL

source /RAID2/cad/synopsis/CIC/hspice.cshrc

source /RAID2/cad/cadence/CIC/ic.cshrc

setenv MGLS_LICENSE_FILE 1717@lshc

setenv LM_LICENSE_FILE 1717@lshc:5280@lshc:26585@lshc

...

alias   btop     'btop --utf-force -t'