Embedded Files
Course Outline:
Course Outline:
Instructor:
Instructor:
Prof. Hsie-Chia Chang(張錫嘉), National Yang Ming Chiao Tung University
Office: ED505
Tel: 03-5131369
Mail: hcchang@mail.nctu.edu.tw
Senior Teaching Assistant:
Senior Teaching Assistant:
Ph.D. Lin-Hung Lai(賴林鴻), National Yang Ming Chiao Tung University
Office: ED430
Tel: 03-5712121 #54238
Mail: lhlai@ieee.org
Prerequisites:
Prerequisites:
Logic Design, Introduction to VLSI
Textbooks:
Textbooks:
Course Objectives:
Course Objectives:
This course aims to convey the senior and graudated EE students techniques to design the VLSI chips using state-of-the-art CAD tools. In addition to learning CAD tools for performance-driven and cost effective IC designs, a top-down design flow and related environment will also be addressed. Upon completion of the course, the student will be able to design the integrated circuits and systems based on standard cell library as well as full-custom layout approaches. As such he/she will be able to work in a team of designers or stand alone.
Teaching Assistant Group:
Teaching Assistant Group:
Lin-Hung Lai, Ph.D. Candidate, lhlai@ieee.org
Wen-Yue Lin, Ph.D. Student, kenlin.eed06@nctu.edu.tw
Yu-Wei Lu, Master Student, ywlu1015.st10@nycu.edu.tw
Zhi-Ting Dong, Master Student, yjdzt918.ee11@nycu.edu.tw
Jia-Xuan Mi, Master Student, c60126c60126.ee10@nycu.edu.tw
Lecture:
Lecture:
F567 (13:30 ~ 16:20, Friday) @ ED415
Grading Policy:
Grading Policy:
Lab Exercise x 5 (66%)
Online Test (8%)
Final Project (18%)
Final Exam (8%)
Course Schedule & Material:
Course Schedule & Material:
All contents below keep confidential, do not separate and abused
And academic usage only, no commercial purpose
Materials belong to National Yang Ming Chiao Tung University (NYCU)
System Integration and Silicon Implementation (Si2) Lab.
© 2022, NYCU Si2 Lab. All rights reserved.
Week1 (2022.09.16)
Lab00 Course Introduction + Environment Setting
Lecturer: Lin-Hung Lai
Week2 (2022.09.23)
Lab01 Digital Circuit + Introduction to Hspice tool
Lecturer: Jia-Xuan Mi
Lab
Week4 (2022.10.07)
Lab02 CMOS Technology + Introduction to Layout tool
Lecturer: Zhi-Ting Dong
Lab
Week6 (2022.10.21)
Lab03 4-bit Full-Adder + Schematic Level Design
Lecturer: Yu-Wei Lu
Lab
Week9 (2022.11.11)
Lab04 Design Knowhow and Logic Synthesis
Lecturer: Lin-Hung Lai
Lab
Week11 (2022.11.25)
Lab05 Architecture Level Design + Verilog and Multiplier
Lecturer: Wen-Yue Lin
Lab
Week13 (2022.12.09)
Final Project Pipeline MAC Design (Team work)
Lecturer: Lin-Hung Lai
Lab
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